Expert VLSI designAssignment Help

I am a BITS Pilani graduate in Electronics and Electrical Engineering, with minors in Mathematics and Physics and a strong focus on Artificial Intelligence, Machine Learning, and Agentic AI. I have 7 years of experience providing tutoring, academic project guidance, and thesis support to students from India and internationally, including the USA, Europe, Gulf countries, and Australia. Over the years, I have supported several hundred academic and technical projects, combining strong STEM fundamentals with clear, structured explanations and practical problem-solving. During my 6-month association with FLN Tutors, I have already delivered 35+ projects. My core expertise lies in Electronics, Electrical Engineering, AI/ML, Mathematics, Physics, and interdisciplinary Computer Science applications. For broader core Computer Science requirements, I also coordinate with a team of subject experts to provide appropriate academic and technical guidance. 📚 Subjects Covered ⚡ Electrical & Electronics Engineering 🔌 Electrical Circuit Analysis & Network Theory 📡 Analog & Digital Electronics 🎛️ Signals & Systems 📊 Digital Signal Processing (DSP) 📶 Communication Systems 🎚️ Control Systems ⚙️ Electrical Machines 🔋 Power Systems ⚡ Power Electronics 🔬 Electronic Devices & Circuits 💻 Embedded Systems & Microcontrollers 🔧 Instrumentation & Measurement 📡 Electromagnetic Theory 🔌 VLSI & Digital System Design 🏭 Industrial Electronics ⚙️ Electric Drives 🔋 Renewable Energy & Electrical Systems 🛠️ Services Offered ✅ Live 1-to-1 Electrical & Electronics Engineering Tutoring ✅ Assignments & Numerical Problem Solving ✅ UG & PG Engineering Project Guidance ✅ Final-Year Project Support ✅ Thesis & Dissertation Guidance ✅ Research Paper & Literature Review Support ✅ Circuit Analysis & Electronic System Design Guidance ✅ Technical Reports & Engineering Documentation ✅ Exam Preparation, Revision & Concept Clarification

Electronics & Communication Engineer with 16+ years of experience in embedded systems, electronics hardware design, firmware development, digital signal processing, microprocessors, microcontrollers, and FPGA-based systems. Experienced in supporting academic assignments, laboratory work, mini-projects, final-year projects, programming and technical problem-solving. I have extensive hands-on experience with embedded hardware and software development, testing, system integration and technical documentation. I can provide practical and easy-to-understand guidance for Electronics and Communication Engineering subjects, assignments, projects and online classes.

I am an Analog and RF IC Design Engineer and Project Lead specializing in high-speed, high-performance circuit design across advanced FinFET technologies. My experience spans TSMC 2nm, 3nm, 7nm, 16nm, 28nm, 65nm, and Samsung 8nm, with expertise in high-speed SerDes, line drivers, LNAs, mixers, DACs, DLLs, LDOs, bandgap references, clocking circuits, and UCIe interfaces. Over the past few years, I have progressed from designing circuit blocks to owning complete IPs end-to-end, covering architecture, design, verification, layout guidance, post-layout optimization, AMS sign-off, silicon validation, and customer delivery. As Project Lead, I currently lead a TSMC 2nm high-speed Line Driver, a TSMC 3nm Low Noise Amplifier (LNA), and a TSMC 7nm space-grade mixed-signal DAC project. Most recently, I led the design and customer delivery of a TSMC 3nm 224 Gsps high-swing driver for an opto-electronic modulator. This project marked my first large-scale RF design, involving aggressive performance targets, advanced EM analysis, and high-speed RF layout methodologies, resulting in multiple patent filings. Highlights include driving a serializer to achieve 10 GHz post-layout operation against an 8 GHz specification, recovering 12 dB of PSRR in a production LDO through post-layout root-cause analysis, executing key blocks of a 3nm DLL—including the BBPD, TDC-based false-lock detection, deserializer, and top-level AMS verification—and developing reusable verification infrastructure that improved team productivity. I also designed UCIe PHY building blocks, including deserializers, clock dividers, Sideband TX/RX, custom standard cells, and the clocking top for a high-speed Time-Interleaved ADC across advanced technology nodes. Beyond circuit design, I enjoy mentoring engineers, collaborating across analog, digital, and layout teams, and driving projects from concept to tape-out. My work has resulted in three patent filings, successful customer deliveries, reusable design methodologies, and contributions to silicon-proven products. I am passionate about pushing the limits of high-speed analog and RF systems and welcome opportunities involving SerDes, RF front-ends, mixed-signal architectures, advanced-node design, and next-generation communication interfaces.